Clocks have found uses in defferent places and events around the world. It is thus important we continue to design and improve the clocking systems to make them more reliable. This is a project which is part of the Digital Systems Design seeks to achieve the objective of designing a seven segment based display that shows the time. This clock is designed so that its time can be set, beeps every 15 minutes, it can be operated from the mains and it is a 12 hour clock. For designing and simulating the circuit schematic Proteus was used. EasyEDA was then used for designing the Printed Cicuit Board. Special purpose ICs were used for the project.
The image above shows the full shcematic of the clock along with the power rectificatio circuit. The power rectification circuit is used because the mains supply is AC voltage but the ICs run on direct voltage and current. The rectification circuit is used to convert the mains AC to DC and step it down to 5V.
The 74190 decade counters are used to achieve the timing. There is one 74190 IC for each digit from the seconds to hours. Pin 11 of the 74190 is the LOAD input which used to preset the counter to any level. This is achieved by putting a low on LOAD input and entering the desires data at the data input pins. A pull down capacitor is used on the LOAD to allow the the charge to build up since it is being powered by short duration signal from the output of a decoding NAND gate. To decode the four bit binary output from the counters I used the 7447 BCD to seven segment decoder. The decoder is connect directly to the the common anode seven segment display. It is important to note that the output from the 7447 decoder are inverted. For the purpose of cascading the inputs the Ripple Clock Output (RCO) pin output is connected to the enable of the adjacent counter, that is for minutes, the RCO of the units counter is connected to the tens. This is true for seconds and hours. The 74ls00 NAND gate and 74ls00 AND gates are used to decode 59 for the minutes and seconds and their output is passed to the enable of the next set of counters, that is the output of the AND from the seconds is connected to the units of the minutes, and the one from minutes is connected to the hours. Finally it should be noted that the hours counters have been decoded such that when they get to 12 then they go back to 1.
For the time setting function two 2-to-1 multiplexers have been used. The 74hc157 IC was used which contains four multiplexers. For the sake of simplicity two IC were used however in practical only one 74HC157 IC will be more than enough for the job. With the mutiplexer we can select if we sent data from the previous counter to the ENABLE (EN) of the current counter or we connect it directly to ground. Since the EN is active low, when connected to ground be it the minutes/hours counters they will be self enabled and start counting at the speed of seconds helping get to the desired time value quick. The beeping was achieved by connecting two counters to to the minutes counters on the main clock. This makes these two counters be in complete sync with the main minutescounters. The difference is that when the beep counters get to 15, they are forced to 1 using some decoding 74LS11 three input AND gates as shown in the shcematic. Also the beep counters are connected to the time set multiplexers such that each time there is time setting the counters are restarted back to 1.
To chaieve the PCB design I used the online EasyEDA design. Figure 2 below shows the the routing in the pcb showing the top and bottom layers with different colors. The blue is for the bottom copper layer while the red is for the top layer copper. One important process when designing PCB is to take note of the design requirements. These design requirements are mainly determined by the abilities of the manufactures and these are things like tolerances and cloarences. However for this project we have not any specificatiions therefore i just used some standard design rules.
In conclusion, the Digital Clock System project has successfully developed a versatile and reliable timekeeping device with a seven-segment display. Key features include time setting, 15-minute beeping intervals, mains operation, and a 12-hour format. The use of specialized ICs, particularly the 74190 decade counters and 7447 BCD to seven-segment decoder, ensures precise timing. The power rectification circuit addresses voltage disparities between mains AC and IC requirements. Meticulous PCB design using EasyEDA adheres to standard rules, promoting manufacturability. The incorporation of multiplexers for time setting and synchronized beeping intervals adds practicality. While achieving set objectives, future iterations could benefit from specific manufacturing specifications and advancements in digital systems design. Overall, the project represents a comprehensive and innovative approach to digital clock system design.
Name: Tinashe Kanukai
Email: tinashe.kanukai@ashesi.edu.gh
Group Website:http://67.205.187.92/~tracey.agbevem/
Team Mate 1
Name: Tracey Agbevem
Email: tracey.agbevem@ashesi.edu.gh
Team Mate 2
Name: Edmund Tetteh
Email: edmund.tetteh@ashesi.edu.gh
Team Mate 3
Name: Kenneth Korah
Email: kenneth.korah@ashesi.edu.gh